The present disclosures relate to interpolators, and more particularly, to a SINC2 interpolator for non-uniformly sampled signals.
The present disclosure further relates to stereophonic audio encoders used for audio/video consumer electronics, and more particularly, to a variable interpolator for a single-chip NICAM (Near-Instantaneously Companded Audio Multiplex) encoder and/or other applications involving Sigma-Delta digital-to-analog converters (DACs).
At present in Europe, DVD players, stereo VCRs, set-top boxes and similar audio/video appliances output composite video and stereo audio via 21-pin SCART (Syndicat francais des Constructeurs d'Appareils de Radio et de Télévision) connectors or via three separate connectors (i.e., video, left audio, right audio). A NICAM encoder with an RF modulator can provide composite video and high-quality stereo sound through a single RF coaxial cable. This allows consumer electronics manufacturers to lower the overall system cost. Furthermore, it will greatly simplify the typical home entertainment wiring.
NICAM encoders, as are used in TV stations, are very expensive rack mount units. Alternatively, less expensive versions of NICAM encoders for other applications still require a circuit board with many discrete components.
Cost and complexity of the traditional encoders are due to several issues, for example, as has been addressed in the patent applications identified herein with respect to the cross-reference to related applications. In one application, a NICAM front-end utilizes a single clock and replaces almost entirely the analog blocks of traditional implementations with digital circuitry. In another, a NICAM processor implements the NICAM algorithm in a very efficient way.
In copending patent application Ser. No. 11/118,211, entitled “NICAM ENCODER WITH A FRONT END” to Zoso et al., the front-end output section generates from the system clock the symbol rate for the QPSK transmitter with a timing circuit, the timing circuit producing a clock which only on an average has a value of 364 kHz. In addition, the front-end output section upsamples the in-phase and quadrature signals to the system clock frequency prior to performing the QPSK modulation with the use of two interpolators. The first of the interpolators is a fixed interpolator, whereas, the second of the interpolators is a variable interpolator. The second interpolator performs a variable interpolation by a factor L for processing non-uniformly sampled signals. While finite impulse response (FIR) and infinite impulse response (IIR) interpolators, sampled at the system clock, could be used for variable interpolation of the non-uniformly sampled signals, the FIR and IIR interpolators are very hardware intensive to implement and thus not very desirable in a cost-effective implementation.
Accordingly, there is a need for a variable interpolator method and apparatus for overcoming the problems in the art as discussed above.
The use of the same reference symbols in different drawings indicates similar or identical items. Skilled artisans will also appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present disclosure.